Analog to digital interface circuits for transforming analog signals to digital signals are widely used in transmission systems requiring reception and regeneration of signals when they are transmitted from one location to another, as well as, for generation of clock pulses in response to sinusoidal stimulus.
Conventional analog to digital interface circuits utilized to accomplish the above-identified tasks may include a comparator such as a differential amplifier for amplification of a small signal and a buffer such as a Schmitt trigger for further amplification of the signal and establishment of logic levels. Often such interface circuits are exposed to varying environmental conditions such as temperature variations, power supply fluctuations and component processing variations. The above-identified conditions may cause variations in the signal rise and fall times and also in the device decision levels resulting in signal time interval distortions. Thus in existing circuits, environmental conditions such as temperature variations, power supply fluctuations and component processing characteristics must be closely controlled to minimize time interval distortion. Attempts to stabilize such variations significantly increase the cost of such interface circuits. The above described problems become especially acute when the interface circuits are implemented in a low voltage CMOS technology which imposes additional constraints on the differential amplifier design and wherein logic rise and fall times are affected by p and n channel process variations.